Etching processes, such as plasma etching, may be used to fabricate integrated semiconductor devices. Typically, however, during such processes, charge may flow on interconnect lines that connect to a gate of such devices. Due to the relatively high capacitance of the gate of the devices, charge may build up (i.e., “charging”) disproportionately at the gate of the semiconductor devices. Because gates in many semiconductor devices include a very thin dielectric layer, the dielectric layer is particularly sensitive to charge accumulation.
For example, the performance of semiconductor devices may be degraded by charge build-up. Charging can produce various forms of damage in the materials used in the semiconductor devices, including formation of electron traps in gate dielectrics and the displacement and implantation of atoms at the material surface due to ion bombardment. The accumulated charges may decrease the breakdown voltage of a gate dielectric of a device and further cause shifts in the threshold voltages of the device, resulting in reduced reliability.